Meet Dr. Alvin Gonzales
Advisor: Dr. Martin Suchara
Institution: Argonne National Laboratory
Bio: Alvin Gonzales is currently a postdoc in the Intelligence Community (IC) Postdoctoral Research Fellowship Program. His postdoc research is on the topic of quantum error correction for temporally correlated errors. His research is being conducted at Argonne National Laboratory. Alvin has a bachelor of science degree in mechanical engineering from the University of Illinois at Chicago (UIC) and a master of science degree with thesis and PhD in computer science from Southern Illinois University Carbondale (SIU). In graduate school, Alvin researched quantum error correction for non-completely positive maps which can arise from a correlated system and environment, quantum dynamical maps, and distributed quantum computing. Alvin also developed SIU’s Safe Walk app and worked at SIU’s high performance computing (HPC) lab. In 2017, he was named SIU Outstanding Graduate Assistant of the year for the Department of Computer Science and SIU Student Employee of the Year. During the final year of his PhD, in 2020, he co-founded the technology startup Quantum Quadrivium Technologies LLP, which is focused on developing quantum technology products. After graduating with his PhD, Alvin interned at Argonne National Laboratory in the summer of 2021 before beginning his current postdoc appointment. He currently has 4 peer reviewed publications on the topics of quantum error correction, distributed quantum computing, and quantum dynamical maps.
Abstract: Achieving high-fidelity quantum computation in the era of noisy intermediate scale quantum technologies requires the use of error mitigation. We introduce a new error mitigation technique that uses a small number of ancillas to mitigate errors by exploiting the symmetries preserved by the computation. Fidelity improvements are achieved by performing a pair of controlled unitary checks at two locations in the circuit. The method is a generalization of symmetry verification since the two controlled operations can be different, which relaxes the condition of commutation required in symmetry verification. Our approach is applicable to general circuits and can mitigate any type of error, including correlated errors, provided that the error operation does not commute with the final check. We evaluate the performance with extensive numerical simulations using different error models, circuits, and unitary check placement. We also explore efficient techniques for finding suitable unitary checks. Our method has been tested numerically on five qubits, but can be extended to larger systems by applying checks on subcircuits consisting of five qubits. In our simulations, circuits of sufficiently large size were simulated to have average fidelity gains of above 10 percentage points. We theorize that average fidelity gain should further increase with deeper circuits.